The present invention relates to a technique for the manufacture of a semiconductor device, and, more particularly, to a multilevel interconnection structure which is fabricated using the so-called damascene method and a technique which is effective when applied to a semiconductor device having such a multilevel interconnection structure.
As semiconductor devices tend to have a higher performance and a more miniaturized structure, a multilevel metallization technique has become necessary for their fabrication. For forming metallization layers in a semiconductor integrated circuit device, there is a known process of forming, over an interlayer insulating film, a thin film of a refractory metal, such as an aluminum (Al) alloy or tungsten; forming there over a resist pattern having the same shape as that of the interconnection pattern by photolithography; and, then etching the thin film using this resist pattern as a mask, thereby forming interconnection patterns. However, this process using an aluminum allo or the like has the inherent problem that there is a marked increase in the wiring resistance owing to the miniaturization of interconnections, which increases the wiring delay, thereby lowering the performance of the semiconductor device. Particularly, in a high-performance logic LSI (Large Scale Integrated Circuit), it causes a serious problem which represents a performance inhibiting factor.
A method (so-called damascene method) of forming an interconnection pattern in a groove, which has been made in an interlayer insulating film, by embedding therein an interconnection metal having copper (Cu) as a main conductor and removing an unnecessary portion of the metal outside the groove by CMP (Chemical Mechanical Polishing) is therefore under investigation.
As an interlayer insulating film wherein a groove to be embedded with a copper interconnection is to be formed, a structure is proposed which has an etching stopper film and a TEOS oxide film stacked one after another in this order. The TEOS oxide film is formed by plasma CVD (Chemical Vapor Deposition) using a TEOS (Tetra Ethyl Ortho Silicate: Si (OC2H5)) gas and an ozone (O3) gas. As the etching stopper film, a silicon nitride film is usually employed, when the interlayer insulating film is made of a TEOS oxide film.
Since the dielectric constant of the silicon nitride film is as high as about 7, disposal of it in the interlayer insulating film, however, increases the dielectric constant of the whole interlayer insulating film. This problem causes a rise in the capacitance between interconnections, leading to deterioration in the acting speed of operation of the semiconductor device or an increase in the power consumption. A technique for incorporating a silicon nitride film in the interlayer insulating film is described, for example, in U.S. Pat. No. 6,051,508.
Employment of a material which has a relatively low dielectric constant of about 2 to 3 and a high etching selectivity relative to the TEOS oxide film has been investigated; and, an organic SOG (Spin On Glass) film which is relatively stable to heat and has high resistance to humidity is regarded as promising for use as a material constituting the interlayer insulating film.
As a result of an investigation of a method of multilevel metallization in an interlayer insulating film, which has an organic SOG film as an etching stopper film, by the damascene method, the present inventors have found that such method involves a problem as described below.
When a groove pattern is formed by successively processing the TEOS oxide film and organic SOG film, using with the patterned resist film as a mask, and then the resist film is removed by oxygen plasma, an xe2x80x94OH group is formed in the organic SOG film and it roughens the film quality. Formation of the xe2x80x94OH group is accompanied by an increase in the water content in the organic SOG film, and when heat is applied thereto, film shrinkage due to a dehydration condensation reaction occurs, resulting in the appearance of cracks in the organic SOG film.
An object of the present invention is to provide a technique which is capable of improving the reliability of the damascene interconnection.
Another object of the present invention is to provide a technique which is capable of reducing the capacitance between interconnections, thereby improving the performance of the semiconductor device.
The above-described objects, further objects and novel features of the present invention will be apparent from the description herein and the accompanied drawings.
Among the aspects and features disclosed in the present application, typical ones will next be summarized below:
(1) A method of manufacturing a semiconductor device comprises the steps of: (a) successively depositing, over a base having a plug or interconnection formed thereon, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; and (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film, wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film and the second insulating film has a lower dielectric constant than a silicon nitride film.
(2) A method of manufacturing a semiconductor device comprises the steps of: (a) successively depositing, over a base having a plug or interconnection formed thereon, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; and (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film, wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the first insulating film, the second insulating film and the hard mask are deposited to have thicknesses of about 50 to 200 nm, about 200 to 2000 nm, and about 50 to 200 nm, respectively.
(3) A method of manufacturing a semiconductor device comprises the steps of: (a) successively depositing, over a base having a plug or interconnection formed thereon, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; and (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film, wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the first insulating film, the second insulating film and the hard mask are deposited to have thicknesses of about 200 to 3000 nm, about 100 to 500 nm, and about 50 to 200 nm, respectively.
(4) A method of manufacturing a semiconductor device comprises the steps of: (a) successively forming, over a base having a plug or interconnection formed thereon, an adhesion layer, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; and (f) etching the first insulating film and adhesion layer in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film and adhesion layer, wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the adhesion layer is a silicon oxide film having a thickness not greater than 50 nm.
(5) A method of manufacturing a semiconductor device comprises the steps of: (a) after hydrogen annealing of a base having a plug or interconnection formed thereon, successively depositing over the base a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; and (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film, wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; and the second insulating film has a lower dielectric constant than a silicon nitride film.
(6) A method of manufacturing a semiconductor device comprises the steps of: (a) after hydrogen annealing of a base having a plug or interconnection formed thereon, successively depositing over the base an adhesion layer, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; and (f) etching the first insulating film and adhesion layer in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film and adhesion layer, wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the adhesion layer is a silicon oxide film having a thickness not greater than 50 nm.
(7) A method of manufacturing a semiconductor device comprises the steps of: (a) successively depositing, over a base having a plug or interconnection formed thereon, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; and (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film, wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the hard mask is a metal film or a metal compound.
(8) A method of manufacturing a semiconductor device comprises the steps of: (a) successively forming, over a base having a plug or interconnection formed thereon, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask and the upper portion of the second insulating film in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask and the upper portion of the second insulating film; (d) removing the resist pattern; (e) etching the lower portion of the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to lower portion of the second insulating film; and (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film, wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the hard mask is a silicon nitride film.
(9) A method of manufacturing a semiconductor device comprises the steps of: (a) successively depositing, over a base having a plug or interconnection formed thereon, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film; (g) successively depositing a barrier metal layer and a copper film over the whole surface of a substrate; and (h) removing the barrier metal layer and the copper film until the upper portion of the second insulating film is exposed; wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; and the second insulating film has a lower dielectric constant than a silicon nitride film.
(10) A method of manufacturing a semiconductor device comprises the steps of: (a) successively depositing, over a base having a plug or interconnection formed thereon, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film; (g) successively depositing a barrier metal layer and a copper film over the whole surface of a substrate; and (h) removing the barrier metal layer and the copper film until the upper portion of the second insulating film is exposed; wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the first insulating film, the second insulating film and the hard mask are deposited to have thicknesses of about 50 to 200 nm, about 200 to 2000 nm, and about 50 to 200 nm, respectively.
(11) A method of manufacturing a semiconductor device comprises the steps of: (a) successively depositing, over a base having a plug or interconnection formed thereon, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film; (g) successively depositing a barrier metal layer and a copper film over the whole surface of a substrate; and (h) removing the barrier metal layer and the copper film until the upper portion of the second insulating film is exposed; wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the first insulating film, the second insulating film and the hard mask are deposited to have thicknesses of about 200 to 3000 nm, about 100 to 500 nm, and about 50 to 200 nm, respectively.
(12) A method of manufacturing a semiconductor device comprises the steps of: (a) successively depositing, over a base having a plug or interconnection formed thereon, an adhesion layer, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; (f) etching the first insulating film and adhesion layer in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film and adhesion layer; (g) successively depositing a barrier metal layer and a copper film over the whole surface of a substrate; and (h) removing the barrier metal layer and the copper film until the upper portion of the second insulating film is exposed; wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the adhesion layer is a silicon oxide film having a thickness not greater than 50 nm.
(13) A method of manufacturing a semiconductor device comprises the steps of: (a) after hydrogen annealing of a base having a plug or interconnection formed thereon, successively depositing over the base a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film; (g) successively depositing a barrier metal layer and a copper film over the whole surface of a substrate; and (h) removing the barrier metal layer and the copper film until the upper portion of the second insulating film is exposed; wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; and the second insulating film has a lower dielectric constant than a silicon nitride film.
(14) A method of manufacturing a semiconductor device comprises the steps of: (a) after hydrogen annealing of a base having a plug or interconnection formed thereon, successively depositing over the ground an adhesion layer, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film; (g) successively depositing a barrier metal layer and a copper film over the whole surface of a substrate; and (h) removing the barrier metal layer and the copper film until the upper portion of the second insulating film is exposed; wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the adhesion layer is a silicon oxide film having a thickness not greater than 50 nm.
(15) A method of manufacturing a semiconductor device comprises the steps of: (a) successively depositing, over a base having a plug or interconnection formed thereon, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask; (d) removing the resist pattern; (e) etching the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the second insulating film; (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film; (g) successively depositing a barrier metal layer and a copper film over the whole surface of a substrate; and (h) removing the barrier metal layer and the copper film until the upper portion of the second insulating film is exposed; wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the hard mask is a metal film or metal compound.
(16) A method of manufacturing a semiconductor device comprises the steps of: (a) successively depositing, over a base having a plug or interconnection formed thereon, a first insulating film, a second insulating film having a lower etching resistance than the first insulating film, and a hard mask; (b) forming thereover a resist pattern; (c) etching the hard mask and the upper portion of the second insulating film in the presence of the resist pattern, thereby transferring the pattern of the resist pattern to the hard mask and the upper portion of the second insulating film; (d) removing the resist pattern; (e) etching the lower portion of the second insulating film in the presence of the hard mask, thereby selectively transferring the pattern of the hard mask to the lower portion of the second insulating film; (f) etching the first insulating film in the presence of the hard mask, thereby transferring the pattern of the hard mask to the first insulating film; (g) successively depositing a barrier metal layer and a copper film over the whole surface of a substrate; and (h) removing the barrier metal layer and the copper film until the upper portion of the second insulating film is exposed; wherein the first insulating film is an organic-functional-group-containing insulating film having a lower dielectric constant than a silicon oxide film; the second insulating film has a lower dielectric constant than a silicon nitride film; and the hard mask is a silicon nitride film.
According to the above-described methods, the first insulating film is protected by the second insulating film upon removal of the resist pattern, which is to be used for transfer of the pattern to the hard mask, by oxygen plasma so that even if the first insulating film is made of an organic insulating film having a low resistance against oxygen plasma, the first insulating film is free from the influence of oxygen plasma, and a deterioration in the film quality of the first insulating film can be suppressed. In addition, since the first insulating film itself is etched using a hard mask, it is not exposed to oxygen plasma.
By the use of the first insulating film made of an organic insulating film having a lower dielectric constant than a silicon oxide film as an etching stopper for the second insulating film having a lower dielectric constant than a silicon nitride film, it becomes possible to constitute the insulating film, which surrounds the plug or interconnection, from an insulating film having a lower dielectric constant than a silicon nitride film and an organic insulating film having a lower dielectric constant than a silicon oxide film, thereby suppressing an increase in the capacitance between interconnections.
Moreover, by increasing the etching selectivity to the hard mask relative to the first insulating film, it becomes possible to thicken the first insulating film having a lower dielectric constant than a silicon oxide film, thereby bringing about high effects for suppressing an increase in the capacitance between interconnections.
Furthermore, delamination of the first insulating film formed over the plug or interconnection can be prevented by subjecting the base-constituting plug or interconnection to hydrogen annealing treatment, thereby positively causing degassing from the gap of the plug or interconnection. By disposing an adhesion layer on the plug or interconnection, delamination of the first insulating film due to the influence of degassing can also be prevented even if degassing from the gap of the plug or interconnection occurs upon formation of the first or second insulating film.